Design Verification Engineer

OpenAI
San Francisco, CA
Job Description
OpenAI is seeking a Design Verification Engineer to ensure functional correctness and robust design for their cutting-edge ML accelerators. This role involves verifying complex hardware systems, working closely with architects, RTLs, and systems teams, and contributing to regression infrastructure. The role is key to delivering reliable silicon at scale and supporting OpenAI's AI-powered future.

Requirements

  • BS/MS in EE/CE/CS or equivalent with 3+ years of experience in hardware verification
  • Proficient in SystemVerilog, UVM, and common simulation/debug tools (e.g., VCS, Questa, Verdi)
  • Strong knowledge of computer architecture concepts, memory and cache systems, coherency, interconnects, and/or ML compute primitives

Benefits

  • Competitive salary
  • Opportunities for professional growth
  • Collaborative work environment
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