2026 Summer -FPGA Design Engineer Intern - Dallas TX

Leonardo DRS

Dallas, TX

Category Engineering

Job Description

The individual will be an intern for the FPGA development team of the EOIS division. In this role, the intern will work closely with other team members to support FPGA development for Infrared Sensors and Systems. Strong mentorship is provided, with plenty of opportunities to learn and develop new skills.

Requirements

Support architecture tradeoff projects.
Participate in RTL coding and test bench development
Contribute in FPGA design flows for synthesis, place and route, timing closure, and design verification testing
Understanding of digital logic and architecture concepts, techniques, and course work
Basic knowledge of HDL/HVLs (e.g. VHDL, Verilog, System Verilog, UVM) and programming/scripting languages (e.g. C++, Perl, Python, TCL)
Good lab and debug skills
Ability to multi-task in an evolving engineering environment
Enrolled in an Undergraduate or Master's degree in Computer Engineering, or Electrical Engineering or related field with at least at 3.0 GPA
Be available to work full-time (40 hours per week) for at least 10 weeks during Summer 2026 at the DRS Dallas facility
U.S. Citizenship status is required as this position will require the ability to access US only data systems
Windows/Linux OS
Good listener and communication skills (verbal and written)
Ambitious, dedicated, and goal-oriented
U.S. Citizenship required. This position requires an active DOD security clearance or the ability to obtain such clearance within a reasonable time after commencement of employment.

Benefits

medical, dental, and vision coverage
company contribution to a health savings account
telemedicine
life and disability insurance
legal insurance
401(k) savings plan
wellness programs
flexible work schedules with our 9/80 program
competitive vacation
health/emergency leave
paid parental leave
community service hours

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