Analog / SerDes / PLL Design Engineers

Chelsea Search Group
Any Location, CA
Category Engineering
Job Description
Analog Design Engineer position with responsibilities including clock generation, custom passive component design, and high-speed analog circuit design. SerDes Design Engineer/Lead position with responsibilities including architecture, specifications, and circuit topologies for next-generation SerDes. PLL Design Engineer position with responsibilities including address challenges in advanced node technologies and architect, design and simulate analog/mixed-signal PLL building blocks.

Benefits

  • Health insurance
  • Dental insurance
  • Vision insurance
  • Retirement plan
  • Stock options
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