Analog / SerDes / PLL Design Engineers

Chelsea Search Group
Phoenix, AZ
Category Engineering
Job Description
Principal Analog Design Engineer responsible for designing custom passive components, high-speed analog circuit design, and supervising analog layouts within advanced process nodes.

Requirements

  • Master’s degree and/or PhD in Electrical Engineering or related fields
  • 5+ years of experience in advanced CMOS design and verification flows
  • Experience with analog design and verification tools (Virtuoso, Spectre, ADE)
  • Knowledge of electromagnetism, lump models, and high-frequency design
  • Production level tape out experience
  • Experience with TSMC FinFET process nodes (16nm/12nm, 7nm/N7, 5nm/N5, 3nm/N3, 2nm/N2)
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