Mixed-Signal Verification Engineer

Chelsea Search Group
Dallas, TX
Job Description
We are seeking a Mixed-Signal Verification Engineer to support verification of analog and mixed-signal IP integrated within digital-on-top SoC environments.

Requirements

  • Lead mixed-signal verification activities for analog IP blocks using SystemVerilog and UVM-based methodologies.
  • Develop scalable digital-on-top verification environments and testbenches incorporating behavioral models for analog IP.
  • Translate analog and mixed-signal specifications into comprehensive verification plans, assertions, coverage models, and checkers.
  • Create and maintain behavioral models using SystemVerilog real-number modeling (RNM) and/or Verilog-AMS for efficient system-level simulation.
  • Execute regression testing, analyze failures, and debug issues across analog, digital, and mixed-signal domains.
  • Verify configuration, calibration, monitoring, protection, and fault-handling interfaces between analog IP and digital control logic.
  • Collaborate closely with analog designers, digital verification engineers, and system architects to ensure verification completeness and tape-out readiness.
  • Develop high-level functional and behavioral models optimized for large-scale SoC simulation while maintaining key analog performance characteristics.
  • Define modeling assumptions, validation approaches, and abstraction strategies in partnership with analog design teams.
  • Contribute to mixed-signal co-simulation methodologies balancing simulation accuracy, runtime efficiency, and model reuse.
  • Utilize industry-standard digital, mixed-signal, and AMS simulation and verification tools.
  • Apply coverage-driven and assertion-based verification methodologies to ensure robust design validation.
  • Participate in design and verification reviews while adhering to established regression, version control, and documentation practices.
  • Identify and implement opportunities for workflow automation and verification flow improvements.
  • Work independently on complex verification assignments while providing mentorship to junior engineers.
  • Contribute verification expertise during IP architecture, integration, and design reviews.
  • Proactively identify technical risks, communicate issues effectively, and drive resolution across cross-functional teams.

Benefits

  • Paid time off
  • 401k matching
  • Retirement plan
  • Health insurance
  • Dental insurance
  • Vision insurance
  • Disability insurance
  • Life insurance
]]>