Role OverviewDeliver complex, high-performance ASICs from RTL/netlist through GDSII and tapeout, owning critical aspects of physical implementation.
What You Will Do
Analyze and optimize designs, collaborate with multidisciplinary teams, develop and optimize floorplans, and perform physical verification and signoff activities.
Why It Might Be a Fit
The role requires 10+ years of direct industry experience with ASIC and/or SoC design, excellent problem-solving skills, and experience with industry standard development tools and methodologies.
Requirements
- 10+ years of direct industry experience with ASIC and/or SoC design
- BSEE/MSEE or equivalent
- Excellent problem-solving skills and attention to detail
- Experience with industry standard development tools and methodologies
- Familiarity with RISC architectures (e.g., ARM, MIPS)
- Proficiency in Synopsys Design Compiler and other EDA tools
- Proven track record of first-pass successes
- Self-starter with the ability to assume leadership roles
- Strong background in RTL based digital IC design using Verilog/SystemVerilog
- Strong understanding of digital design principles
- Willingness to mentor and develop less experienced engineers
Benefits
- Dental insurance
- Vision insurance
- Health insurance
- Retirement plan
- Paid time off
- Paid holidays
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