Role OverviewAs the Senior Manager of HPS Test Engineering, you will own the end-to-end testing architecture, strategy, and execution for next-generation or products and infrastructure. This position bridges the gap between top-tier silicon designers, internal hardware/software teams, and volume manufacturing operations.
What You Will Do
You will be responsible for leading a high-performing team of test hardware and software engineers to develop comprehensive test solutions (ICT, FCT, SLT, BI and Boundary Scan).
Why It Might Be a Fit
You will maintain critical cross-functional alignment with the Front-End Senior Manager, Back-End Senior Manager, and Director of Technology Roadmapping to maximize test coverage, minimize escape metrics, and optimize manufacturing throughput and first-pass yield.
Requirements
- 5+ years of direct experience leading and scaling multi-disciplinary test hardware and software engineering teams
- Proven experience deploying complex test vectors for high-speed digital systems, enterprise servers, hyperscaler infrastructure, or working directly alongside tier-1 silicon providers (Nvidia, Broadcom, Marvell)
- Expert level understanding of DFT methodologies, IEEE 1149.x Boundary Scan (JTAG), high-speed serial links (PCIe Gen 5/6, SerDes), instrumentation automation, programming frameworks (Python, C/C++, LabVIEW), and database/data mining systems for statistical process control (SPC)
- Outstanding project management maturity with a focus on metrics-driven problem solving (Six Sigma Black Belt preferred); ability to translate technical yield constraints to business risks for C-suite and customer reviews
Benefits
- Competitive salary
- Equity
- Health insurance
- Paid time off (PTO)
- Retirement plan
- Learning budget
- Parental leave
- Wellness program
- Visa/relocation assistance
- Remote flexibility
- Stipends
- Bonus/commission
- Paid holidays
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