SG Analog Layout Engineer

TetraMem
San Jose, CA
Job Description
Role Overview

We are seeking an experienced Analog Layout Engineer to join our team. The Analog Layout Engineer will be responsible for designing and implementing analog and mixed-signal layout designs for integrated circuits. This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals.

What You Will Do

Lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout, collaborate with project managers and design engineers to understand project requirements, drive critical floor-planning decisions and key layout methodology, and review and approve final layout designs for production.

Why It Might Be a Fit

The ideal candidate will have a B.S. EE and 8+ years of relevant industry experience, experience in analog and mixed-signal layout design of deep submicron CMOS circuits, and proficiency in industry-standard design software such as Cadence Virtuoso, Calibre DRC, LVS.

Requirements

  • B.S. EE and 8+ years of relevant industry experience or equivalent
  • Experience in analog and mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes
  • Proficiency in industry-standard design software, such as Cadence Virtuoso, Calibre DRC, LVS
  • Strong understanding of layout design principles and best practices
  • Excellent communication, collaboration, and leadership skills
  • Ability to manage multiple projects simultaneously while maintaining attention to detail
  • Demonstrated ability to work independently and as part of a team
  • Strong problem-solving and decision-making skills

Benefits

  • Salary Range: S$80,000 - $180,000 / year
  • Equal Opportunity Employer
  • Inclusive environment for all employees
  • Reasonable accommodations for qualified applicants with disabilities
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