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Substrate IC Package Layout Design Engineer
Etched
San Jose, CA
Category
Engineering
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Job Description
Etched is building the world’s first AI inference system purpose-built for transformers, and we're looking for a Substrate IC Package Layout Design Engineer to join our team. As a member of our team, you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. We offer competitive compensation packages, including generous equity packages, comprehensive insurance coverage, and other top-of-market benefits.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
10+ years of experience in IC substrate layout design for high-performance processors or accelerators
Extensive experience with large substrate packages (>50mm) and complex high-density layouts
Proven experience with high-power (700W+) package designs and robust power delivery networks
Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches)
Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWos
Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification)
Deep understanding of SI/PI principles and how they apply to package-level design
Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment
Benefits
Competitive compensation packages, including generous equity packages
Comprehensive insurance coverage
Other top-of-market benefits
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